signed8_typ b[100];
  signed8_typ key;
  unsigned32_typ dummy;
  unsigned8_typ sekundenzaehler;
  unsigned8_typ counter;
  unsigned16_typ adress;
  unsigned16_typ line;
  unsigned16_typ column;
  
void main()
{
  /* Testprogram to check the IIC function */
  while (1) {
    if (rs_intcharreceived()) {
      key = rs_intgetchar();
      key = toupper(key);
      switch (key) {
      case 'A': /* Start transfer of Data and show state of parameter RAM */
	reg_CFSR3_W = (reg_CFSR3_W & 0xFFF0) | 0x000D;	/* Not really needed here */
	reg_CIER_W = reg_CIER_W | 0x0;	/* Not really needed here */
	reg_CPR1_W = (reg_CPR1_W & 0xFFFC) | 0x0003;	/* Not really needed here */
	reg_HSRR1_W = 0x0001;	/* Start transfer. Menu 'C' to 'F' should be pressed first */
	while (!rs_intcharreceived()) {	/* While no key is pressed, show state of parameter RAM */
	  sprintf(b, "ADDRESS: %04X", reg_PARM0_0_W);
	  prnt_line(b, 1);
	  sprintf(b, "DATA:    %04X", reg_PARM0_2_W);
	  prnt_line(b, 2);
	  sprintf(b, "SHIFT:   %04X", reg_PARM0_4_W);
	  prnt_line(b, 3);
	  sprintf(b, "BITSTGO: %04X", reg_PARM0_6_W);
	  prnt_line(b, 4);
	  sprintf(b, "CLKLOWT: %04X", reg_PARM0_8_W);
	  prnt_line(b, 5);
	  sprintf(b, "STATUS:  %04X", reg_PARM0_A_W);
	  prnt_line(b, 6);
	}
	break;
      case 'B':
	break;
      case 'C':
	/* Set the paramater RAM to send a 0x45 to adress 0 in an IIC eeprom with slave adress 0xA0 */
	reg_PARM0_0_W = 0xA000;	/* Use slave adress 0xA0 and byte adress 0 in the EEPROM */
	reg_PARM0_2_W = 0x1245; /* 0x45 should be sent */
	reg_PARM0_8_W = 32000;	/* Very slow clock, to monitor the parameter RAM */
	reg_CFSR3_W = (reg_CFSR3_W & 0xFFF0) | 0x000D;	/* function IIC */
	reg_CIER_W = reg_CIER_W | 0x0; /* No interrupt */
	reg_CPR1_W = (reg_CPR1_W & 0xFFFC) | 0x0003; /* highest priority */
	reg_HSRR1_W = 0x0003; /* Init the pins, but don't transfer anything */
	break;
      case 'D':
	/* Set the paramater RAM to send a 0x67 to adress 1 in an IIC eeprom with slave adress 0xA0 */
	reg_PARM0_0_W = 0xA001;
	reg_PARM0_2_W = 0x1267;
	reg_PARM0_8_W = 32000;
	reg_CFSR3_W = (reg_CFSR3_W & 0xFFF0) | 0x000D;
	reg_CIER_W = reg_CIER_W | 0x0;
	reg_CPR1_W = (reg_CPR1_W & 0xFFFC) | 0x0003;
	reg_HSRR1_W = 0x0003;
	break;
      case 'E':
	/* Set the paramater RAM to receive a byte from adress 0 in an IIC eeprom with slave adress 0xA0 */
	reg_PARM0_0_W = 0xA100;
	reg_PARM0_2_W = 0x1234;
	reg_PARM0_8_W = 24;
	reg_CFSR3_W = (reg_CFSR3_W & 0xFFF0) | 0x000D;
	reg_CIER_W = reg_CIER_W | 0x0;
	reg_CPR1_W = (reg_CPR1_W & 0xFFFC) | 0x0003;
	reg_HSRR1_W = 0x0003;
	break;
      case 'F':
	/* Set the paramater RAM to receive a byte from adress 1 in an IIC eeprom with slave adress 0xA0 */
	reg_PARM0_0_W = 0xA101;
	reg_PARM0_2_W = 0x1234;
	reg_PARM0_8_W = 24;
	reg_CFSR3_W = (reg_CFSR3_W & 0xFFF0) | 0x000D;
	reg_CIER_W = reg_CIER_W | 0x0;
	reg_CPR1_W = (reg_CPR1_W & 0xFFFC) | 0x0003;
	reg_HSRR1_W = 0x0003;
	break;
      case 'G':
	/* Get all data out of a 256 byte EEPROM */
	reg_CFSR3_W = (reg_CFSR3_W & 0xFFF0) | 0x000D; /* Again, it's only needed once */
	reg_CIER_W = reg_CIER_W | 0x0;
	reg_CPR1_W = (reg_CPR1_W & 0xFFFC) | 0x0003;
	reg_PARM0_8_W = 24; /* Much faster than above */
	reg_HSRR1_W = 0x0003;
	for (line = 0; line < 16; line++) {
	  prnt_line("", line + 1);
	  sprintf(b, "%02X ", reg_PARM0_0_W);
	  rs_intputs(b);
	  for (column = 0; column < 16; column++) {
	    adress = 16 * line + column;
	    /* Set PARM0_0 with the right adress information. The highest bit is coded in the slave adress */
	    reg_PARM0_0_W = 0xA100 | ((adress << 1) & 0x0200) | (adress & 0x00FF);
	    reg_PARM0_A_W = 0; /* Reset status information */
	    reg_HSRR1_W = 0x0001; /* Start transfer */
	    while ((reg_PARM0_A_W & 0x8000) == 0) {} /* Wait for end of transfer */
	    sprintf(b, "%02X ", reg_PARM0_2_W); /* Write byte on screen */
	    rs_intputs(b);
	  }
	}
	break;
      case 'H':
	/* Write data into EEPROM */
	for (line = 0; line < 16; line++) {
	  prnt_line("", line + 1);
	  for (column = 0; column < 16; column++) {
	    adress = 16 * line + column;
	    reg_PARM0_0_W = 0xA000 | ((adress << 1) & 0x0200) | (adress & 0x00FF);
	    reg_PARM0_2_W = 16 * line + column + counter;
	    reg_PARM0_8_W = 24;
	    do {
	      reg_PARM0_A_W = 0; /* Reset status */
	      reg_HSRR1_W = 0x0001;
	      while ((reg_PARM0_A_W & 0x8000) == 0) {} /* Wait for IIC transfer */
	    }
	    while ((reg_PARM0_A_W & 0x8100) == 0x8100); /* Wait for acknowledge of the EEPROM */
	    sprintf(b, "%02X ", reg_PARM0_2_W); /* Write byte to screen */
	    rs_intputs(b);
	  }
	}
	counter++;
	break;
      default:
	prnt_helpline("wrong command!");
	tim_warte_ms(1000);
	break;
      }
      prnt_helpline("");
    }      
  }
}